The present invention relates to decoupling capacitors of an output stage for multi-supply application and performance control of integrated circuits (ICs) (e.g. input/output (I/O) signal control for a plurality of I/O terminals of a semiconductor chip and decoupling capacitor control for these I/O terminals), and more particularly, to an apparatus for performing signal driving in an electronic device.
According to the related art, regarding double data rate fourth-generation synchronous dynamic random-access memory (DDR4 SDRAM) specifications, a variant of the lower power DDR4 (LPDDR4) specification is proposed and may be called LPDDR4x, where the supply voltage of an output stage may be only 0.4 Volts (V), rather than 1.1 V of the LPDDR4 specification. Based on this design, some problems such as some side effects may occur. For example, when the supply voltage of 0.4 V (rather than 1.1 V) is applied, the capacitance of a decoupling capacitor may become only 30% of the original capacitance value approximately, causing the performance of the decoupling capacitor to be degraded. Although increasing the area that the decoupling capacitor occupies on an IC may be helpful on achieving the same decoupling effect, the area of the decoupling capacitor may become approximately 333% of the original area, causing the associated costs of the IC to be greatly increased. Therefore, a novel architecture is required for improving the performance of ICs with fewer side effects.